In recent years, downscaling in manufacturing of a semiconductor device is approaching a physical limit. Accordingly, a semiconductor device has been progressively formed in three dimensions as a new method for increasing the density of chips. For example, development of a FinFET structure as a logic semiconductor and a three-dimensional memory structure as a semiconductor memory has been advanced.
However, there is a problem that loads on processes are greatly increased during formation of a three-dimensional semiconductor device.
For example, in a CMP (Chemical Mechanical Polishing) process to flatten a wafer, the amount of polishing is greatly increased as compared to that in conventional techniques and a required time for the CMP process is also increased due to increase in the polishing amount. Furthermore, when the number of processed wafers is increased, the state of a polishing surface of a polishing pad gradually changes and accordingly the polishing rate may change. For example, at the beginning of use of the polishing pad, a small quantity of abrasive grains remains on the polishing pad. However, when the number of processed wafers increases, the amount of abrasive grains remaining on the polishing pad increases and thus the polishing rate increases.
Accordingly, in the CMP process, it is required to increase the polishing rate while keeping the flatness and also to stabilize the polishing rate.